SK hynix Unveils In-House H-TPU Cores to Overcome Power and Performance Bottlenecks in Next-Generation SSDs

Memory and storage giant SK hynix has detailed comprehensive plans to drastically reduce its reliance on power-hungry general-purpose CPU cores by introducing a custom, in-house designed core known as the Hynix Transaction Processing Unit, or H-TPU.

Unveiled during a high-profile industry gathering, the development marks a significant shift in how the company intends to handle the escalating computational demands of modern data storage. Not to be confused with an artificial intelligence accelerator designed for heavy machine learning training or inference workloads, the H-TPU is a specialized processing unit engineered specifically to assist with the repetitive, mundane tasks traditionally handled by a solid-state drive’s main controller. As modern storage drives grow exponentially faster, managing their internal operations typically demands an increasing number of traditional cores on the controller, creating severe power and physical space constraints that hardware designers are struggling to overcome.

The operational architecture of the newly detailed H-TPU involves placing these tiny, highly efficient cores into dedicated clusters. In this configuration, they are tasked with handling routine input and output operations utilizing a streamlined, four-stage, in-order pipeline. Meanwhile, high-level management and complex decision-making processes are left to the traditional Arm CPU on the controller. According to technical specifications shared by the company, these miniature processing cores are remarkably efficient, drawing only about 2.5 percent of the power consumed by a standard general-purpose CPU core. Furthermore, they occupy a remarkably small footprint, requiring just around 4 percent of the physical area of a traditional core. Building on these impressive efficiency metrics, SK hynix now plans to integrate the H-TPU across its broad portfolio of products, according to reports from industry publication TheElec.

The strategic pivot was formally outlined by Koo In-jae, SK hynix’s Vice President of system-on-chip design, during an address at the International SoC Design Conference, known as ISOCC 2026, held earlier this week. Speaking during a presentation titled "From SSD Controllers to AI Memory SoCs," Koo highlighted a growing crisis within the hardware industry, pointing out that solid-state drive controller CPUs have essentially reached their absolute limits regarding power consumption and physical die area.

During his presentation, Koo elaborated on the compounding engineering challenges facing storage architects today. He noted that PCIe bandwidth continues to double with every successive hardware generation, creating an immense throughput pressure that traditional controller CPU clock speeds and control capabilities simply cannot keep up with. As interface speeds accelerate, the processing overhead required to manage data flow threatens to overwhelm the controller, turning the CPU into a severe performance bottleneck. To combat this looming crisis, SK hynix reportedly plans to deploy the H-TPU across its extensive lineup of NAND-based products, with a primary focus on next-generation enterprise solid-state drive controllers.

This aggressive push toward radical architectural efficiency arrives at a time when the broader storage industry is locked in an unending chase for higher input/output operations per second, commonly referred to as IOPS. In enterprise environments, particularly those powering modern artificial intelligence data centers, the demand for rapid data retrieval has skyrocketed. Industry leaders, including collaborations between major technology and hardware firms, are actively targeting unprecedented performance milestones—such as drives aiming for one hundred million IOPS by 2027, representing a staggering thirty-three-fold increase compared to existing enterprise drives designed for exclusive use in AI servers.

Meeting these astronomical performance targets requires rethinking every aspect of the solid-state drive controller, from the underlying firmware down to the physical silicon architecture. By offloading repetitive, low-level transaction processing to dedicated, ultra-low-power H-TPU clusters, SK hynix hopes to free up valuable thermal headroom and silicon real estate on its controllers. This architectural breathing room will allow future enterprise drives to sustain extreme data transfer rates and massive IOPS loads without succumbing to the thermal throttling and power consumption walls that threaten traditional CPU-bound controller designs. As the rollout progresses across the company’s product roadmap, these custom processing units could redefine the baseline for enterprise storage efficiency in the era of high-performance artificial intelligence computing.